MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1655

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

26.4 Programmable Registers
Each ENET-MAC with its corresponding management counters implements a register space
of 512 32-bit registers. All reads and writes must be 32 bits wide. Reserved bits should be
written with 0 and ignored on read to allow future extension. Unused registers read back 0
and a write has no effect.
ENET-MAC0 base address is 0x800F0000; ENET-MAC1 base address is 0x800F4000.
Freescale Semiconductor, Inc.
800F_0004
800F_0008
800F_0010
800F_0014
800F_0024
800F_0040
800F_0044
Absolute
address
(hex)
Symbol
Fmax
thold
tsu
tco
ENET MAC Interrupt Event Register (HW_ENET_MAC_EIR)
ENET MAC Interrupt Mask Register (HW_ENET_MAC_EIMR)
ENET MAC Receive Descriptor Active Register
(HW_ENET_MAC_RDAR)
ENET MAC Transmit Descriptor Active Register
(HW_ENET_MAC_TDAR)
ENET MAC Control Register (HW_ENET_MAC_ECR)
ENET MAC MII Management Frame Register
(HW_ENET_MAC_MMFR)
ENET MAC MII Speed Control Register
(HW_ENET_MAC_MSCR)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
MII Maximum Frequency
MII Outputs Clock to Out
Table 26-28. MII Timing Characteristics
MII Inputs Setup Time
MII Inputs Hold Time
Register name
Description
HW_ENET memory map
mii_tx_d(3:0)
mii_tx_err
mii_tx_en
tx_clk
too
2.5 MHz
2 ns
0 ns
Min
(in bits)
-
Width
32
32
32
32
32
32
32
Chapter 26 Ethernet Controller (ENET)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Value
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
F000_0000h
0000_0000h
0000_0000h
25 MHz
5 ns
Max
-
-
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