MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2001

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
31.7.32 Port Status and Control 1 Register (HW_USBCTRL_PORTSC1)
Host Controller: A host controller must implement one to eight port registers. The number
of port registers implemented by a particular instantiation of a host controller is documented
in the HCSPARAMs register and is fixed at 1 in this implementation. Software uses this
information as an input parameter to determine how many ports need service. This register
is only reset when power is initially applied or in response to a controller reset. The initial
conditions of a port are: - No device connected - Port disabled If the port has port power
control, this state remains until software applies power to the port by setting port power to
1. Device Controller: A device controller must implement only port register 1 and it does
not support power control. Port control in device mode is only used for status port reset,
suspend, and current connect status. It is also used to initiate test mode or force signaling
and allows software to put the PHY into low power suspend mode and disable the PHY
clock. * Default Value: 00010000000000000000XX0000000000b (Host mode)
00010000000000000001XX0000000100b (Device mode) X = Unknown
Address:
Re-
Freescale Semiconductor, Inc.
set
Bit
W
R
31
0
PTS
31 30
27 26
PSPD
Field
PTW
PTS
STS
29
28
30
0
29
0
HW_USBCTRL_PORTSC1
28
1
Parallel Transceiver Select.
For this implementation, always set to 00b for UTMI.
Note that this field is made up from PORTSCx bits 25, 30 and 31.
0
1
2
3
4
Serial Transceiver Select.
Always 0.
Parallel Transceiver Width.
This bit is always 1, indicating an 16-bit (30-MHz) UTMI interface.
Port Speed.
This register field indicates the speed at which the port is operating. For high-speed mode operation in the
host controller and high-speed/fullspeed operation in the device controller, the port routing steers data to
the protocol engine.
PSPD
27
0
UTMI — UTMI/UTMI+.
PHIL — Phillips-Classic.
ULPI — ULPI.
SERIAL — Serial/1.1FS.
HSIC — UTMI for HSIC.
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
HW_USBCTRL_PORTSC1 field descriptions
23
0
22
0
21
0
8008_0000h base + 184h offset = 8008_0184h
20
0
19
0
18
0
PTC
17
0
Chapter 31 USB High-Speed On-the-Go Host Device Controller
16
0
15
0
Description
PIC
14
0
13
0
12
0
11
0
LS
10
0
0
9
0
8
0
7
0
6
0
5
0
4
3
0
0
2
0
1
2001
0
0

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