MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1991

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Address:
Re-
31.7.22 USB Device Address Register (Device Controller mode)
In Device Controller mode, the upper seven bits of this register represent the device address.
After any controller reset or a USB reset, the device address is set to the default address
(0). The default address will match all incoming addresses. Software shall reprogram the
address after receiving a SET_ADDRESS descriptor. The USBADRA is used to accelerate
the SET_ADDRESS sequence by allowing the DCD to preset the USBADR register before
the status phase of the SET_ADDRESS descriptor. This is a read/write register. Writes must
be DWORD writes.
Address:
Freescale Semiconductor, Inc.
set
Reset
Reset
Bit
W
R
PERBASE
Bit
Bit
31
W
W
0
R
R
31 12
RSVD
Field
11 0
30
0
31
15
0
0
29
0
HW_USBCTRL_DEVICEADDR
0154h
HW_USBCTRL_PERIODICLISTBASE 8008_0000h base + 154h offset = 8008_
0154h
(HW_USBCTRL_DEVICEADDR)
28
0
30
14
0
0
Base Address (Low).
These bits correspond to memory address signals [31:12], respectively. Only used by the host controller.
Reserved.
Must be written as zeros. During runtime, the values of these bits are undefined.
27
0
26
0
HW_USBCTRL_PERIODICLISTBASE field descriptions
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
USBADR
24
0
28
12
0
0
23
0
PERBASE
22
0
27
11
0
0
21
0
20
0
26
10
0
0
8008_0000h base + 154h offset = 8008_
19
0
18
25
0
0
0
9
17
0
Chapter 31 USB High-Speed On-the-Go Host Device Controller
RSVD[15:0]
16
24
0
0
0
8
15
0
Description
23
14
0
0
0
7
13
0
22
12
0
0
6
0
11
0
21
0
5
0
10
0
0
9
RSVD[23:16]
20
0
4
0
0
8
0
7
19
0
0
3
RSVD
0
6
0
5
18
0
0
2
0
4
3
0
17
0
0
1
0
2
0
1
1991
16
0
0
0
0
0

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