MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 72

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Section Number
72
29.9.97
29.9.98
29.9.99
29.9.100
29.9.101
29.9.102
29.9.103
29.9.104
29.9.105
29.9.106
29.9.107
29.9.108
29.9.109
29.9.110
29.9.111
29.9.112
29.9.113
29.9.114
29.9.115
29.9.116
29.9.117
ENET SWI Port 0 incoming frames discarded due to mismatching or missing VLAN id
(HW_ENET_SWIIDISC_VLAN0).........................................................................................................1923
ENET SWI Port 0 incoming frames discarded due to missing vlan tag
(HW_ENET_SWIIDISC_UNTAGGED0)..............................................................................................1924
ENET SWI Port 0 incoming frames discarded (after learning) as port is configured in blocking mode
(HW_ENET_SWIIDISC_BLOCKED0).................................................................................................1924
ENET SWI Port 1 Outgoing frames discarded due to output Queue congestion
(HW_ENET_SWIODISC1)....................................................................................................................1925
ENET SWI Port 1 incoming frames discarded due to mismatching or missing VLAN id
(HW_ENET_SWIIDISC_VLAN1).........................................................................................................1925
ENET SWI Port 1 incoming frames discarded due to missing vlan tag
(HW_ENET_SWIIDISC_UNTAGGED1)..............................................................................................1926
ENET SWI Port 1 incoming frames discarded (after learning) as port is configured in blocking mode
(HW_ENET_SWIIDISC_BLOCKED1).................................................................................................1926
ENET SWI Port 2 Outgoing frames discarded due to output Queue congestion
(HW_ENET_SWIODISC2)....................................................................................................................1927
ENET SWI Port 2 incoming frames discarded due to mismatching or missing VLAN id
(HW_ENET_SWIIDISC_VLAN2).........................................................................................................1927
ENET SWI Port 2 incoming frames discarded due to missing vlan tag
(HW_ENET_SWIIDISC_UNTAGGED2)..............................................................................................1928
ENET SWI Port 2 incoming frames discarded (after learning) as port is configured in blocking mod
(HW_ENET_SWIIDISC_BLOCKED2).................................................................................................1928
ENET SWI Interrupt Event Register (HW_ENET_SWIEIR).................................................................1929
ENET SWI Interrupt Mask Register (HW_ENET_SWIEIMR)..............................................................1930
ENET SWI Pointer to Receive Descriptor Ring (HW_ENET_SWIERDSR).........................................1931
ENET SWI Pointer to Transmit Descriptor Ring (HW_ENET_SWIETDSR).......................................1932
ENET SWI Maximum Receive Buffer Size (HW_ENET_SWIEMRBR)..............................................1932
ENET SWI Receive Descriptor Active Register (HW_ENET_SWIRDAR)...........................................1933
ENET SWI Transmit Descriptor Active Register (HW_ENET_SWITDAR).........................................1933
ENET SWI Learning Records A (0) and B (1) (HW_ENET_SWILRN_REC_0)..................................1934
ENET SWI Learning Record B(1) (HW_ENET_SWILRN_REC_1).....................................................1934
ENET SWI Learning data available status. (HW_ENET_SWILRN_STATUS).....................................1935
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Title
Freescale Semiconductor, Inc.
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