MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1622

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

MAC Receive
The PTPv2 flags field contains further details on the type of message, especially if one-step
or two-step implementations are used. The flags field consists of two octets with the
following meanings for the bits. Reserved bits are set to 0 (false).
26.3.7 MAC Receive
26.3.7.1 Overview
The MAC receive engine performs the following tasks:
1622
Octet Offset
• Check Frame Framing
• Remove Frame preamble and Frame SFD field
• Frame Discarding based on Frame Destination address field
6 (first)
messageId
0x9
0xa
0xb
0xc
0xd
bit
0
1
2
3
4
5
6
7
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 26-20. PTPv2 Message Flags Field Definitions
ALTERNATE_MASTER
PATH_DELAY_FOLLOW_UP
profile specific
profile specific
TWO_STEP
UNICAST
MANAGEMENT
Message Name
reserved
reserved
reserved
DELAY_RESP
ANNOUNCE
SIGNALING
Name
True (1) if transport layer address uses a unicast destination
address, false (0) if multicast is used.
See IEEE 1588 Clause 17.4
False (0) for one-step clock
True (1) for two-step clock
Description
general message
general message
general message
general message
general message
Freescale Semiconductor, Inc.
Message