MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 919

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
11.12.4 Battery Charge Control Register (HW_POWER_CHARGE)
This register cotrols the battery charge features for both NiMH slow charge and Li-Ion
charge.
HW_POWER_CHARGE: 0x030
HW_POWER_CHARGE_SET: 0x034
HW_POWER_CHARGE_CLR: 0x038
HW_POWER_CHARGE_TOG: 0x03C
Address:
Freescale Semiconductor, Inc.
Reset
DC_STOPCLK
DC_HALFCLK
PWD_XTAL24
EN_DC_PFM
LESSANA_I
Bit
W
R
Field
4
3
2
1
0
31
0
HW_POWER_CHARGE
30
0
Reduce DC-DC analog bias current 20%. This bit is intended to reduce power in low-performance operating
modes, such as USB suspend.
Powers down the 24 MHz oscillator, even when the system is still operating. This can be used with
ENABLE_OSC and SELECT_OSC to reduce current in usb suspend and other low power modes where
the accuracy of the clock is not important.
Stop the clock to internal logic of switching DC-DC converter. This bit will take effect only after the switching
FETs are off, due to battery configuration, PFM mode, or internal linear regulator operation.
Forces DC-DC to operate in a Pulse Frequency Modulation mode. Intended to allow minimum system power
in very low-power configurations when increased ripple on the supplies is acceptable. Also, HYST_SIGN in
HW_POWER_LOOPCTRL should be set high when using PFM mode.
Slow down DC-DC clock from 1.5 MHz to 750 kHz. This maybe be useful to improve efficiency at light loads
or improve EMI radiation, although peak-to-peak voltage on the supplies will increase.
RSRVD6
29
0
HW_POWER_MINPWR field descriptions (continued)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
0
27
0
8004_4000h base + 30h offset = 8004_4030h
26
0
ADJ_VOLT
25
0
24
0
Description
23
0
22
0
21
0
20
0
Chapter 11 Power Supply
19
0
18
0
17
0
16
1
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