MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2113
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Address:
Freescale Semiconductor, Inc.
Reset
Reset
SYNC_SIGNALS_
END_DETECTED
VSYNC_EDGE_
DMACMDKICK
STREAMING_
WAIT_FOR_
Bit
Bit
W
W
R
R
ON_REG
ENABLE
HSYNC
Field
OUT
31
30
29
28
27
26
31
15
0
0
HW_LCDIF_DEBUG0
30
14
0
0
Read only view of the DOTCLK_MODE or DVI_MODE bit going from 1 to 0.
Read only view of WAIT_FOR_VSYNC_EDGE bit in the VSYNC mode after it comes out of the TXFIFO.
Read only view of internal sync_signals_on_reg signal.
Read only view of the DMA command kick signal.
Read only view of ENABLE signal.
Read only view of HSYNC signal.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
HW_LCDIF_DEBUG0 field descriptions
CUR_REQ_
8003_0000h base + 1D0h offset = 8003_01D0h
27
11
1
0
STATE
26
10
1
0
25
1
0
9
24
0
0
8
MST_OUTSTANDING_REQS
Description
23
1
0
7
22
0
0
6
21
0
5
0
Chapter 33 LCD Interface (LCDIF)
20
0
4
0
CUR_STATE
19
0
0
3
MST_WORDS
18
0
0
2
17
0
0
1
2113
16
1
0
0
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