MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1938

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Application UART Overview
Two DMA channels are supported, one for transmit and one for receive.
If a timeout condition occurs in the middle of a receive DMA block transfer, then the UART
ends the DMA transfer and signals the end of the DMA block transfer. A receive DMA can
be setup to get the status of the previous receive DMA block transfer. The status indicates
the amount of valid data bytes in the previous receive DMA block transfer.
If a framing, parity, or break error occurs during reception, the appropriate error bit is set
and stored in the FIFO. If an overrun condition occurs, the overrun register bit is set
immediately and FIFO data is prevented from being overwritten. You can program the
FIFOs to be one-byte deep, providing a conventional double-buffered UART interface.
The modem status input signal Clear To Send (CTS) and output modem control line Request
To Send (RTS) are supported. A programmable hardware flow control feature uses the
nUARTCTS input and the nUARTRTS output to automatically control the serial data flow.
1938
UART_RXD
UART_RTS
UART_CTS
UART_TXD
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Figure 30-1. Application UART Block Diagram
APBX Master
AHB Slave
ARM Core
Shared DMA
AHB
UART Programmable Registers
AHB Master
RX FSM
TX FSM
AHB-to-APBX Bridge
SRAM
and FIFOs
UART
BAUDRATE
XCLK
24-MHz
Divide
XTAL
Osc.
by n
Freescale Semiconductor, Inc.