MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1595
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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26.2.1.1 Overview
The Unified DMA (uDMA) block is connected with the ENET-MAC and through the
3PSWITCH. This is NOT a general purpose DMA but is highly specific to support Ethernet
traffic.
Fundamentally, there are two basic modes of operation. The uDMA supports a legacy mode
which enables data to be transferred in a format significantly consistent with the legacy
FEC device that exists on several parts through the Legacy Buffer Descriptor (LBD).
Additionally the uDMA supports an Enhanced Buffer Descriptor (EBD) which in turn
provides the ability to make use of several new features including (but not limited to)
IEEE-1588 support, Gigabit Ethernet, transmit error checking and various off loading
features.
The uDMA blocks are highlighted in
In reference to the figure:
1 - The interface between the MAC-NET and the SoC Pad Logic. All pin multiplexing takes
place outside the ENET-MAC, including RMII and MII.
2 - The ENET-MAC communicates with the Unified DMA through two FIFO interfaces.
One of the FIFO interfaces is for RX the other is for TX. These interfaces also contain a
set of sideband signals.
3 - The Unified DMA communicates with the SoC Platform through this interface.
26.2.1.2 Features
The primary features of the uDMA are listed below:
Freescale Semiconductor, Inc.
• Only Surport big-endian.
• Separate TX and RX interfaces to allow for minimum space or maximum data
throughput.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
APB
Bus
Figure 26-2. Typical uDMA SoC Connection
SOC Pad
SOC Pad
MAC0
MAC1
Figure
1
1
26-2.
Switch
2
2
uDMA0
uDMA1
Chapter 26 Ethernet Controller (ENET)
3
3
AHB
Bus
1595
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