MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1079

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

open, then the current transaction will be interrupted at the next natural burst boundary of
the DRAM device. If the page is not currently open, then the new request will be placed at
the top of the command queue while its page is prepared.
There are a fixed number of latency cycles in the memory controller, based on the pipeline
through the memory controller logic. These steps are:
For asynchronous AXI interfaces, an additional 4–5 cycles are included for the round-trip
transaction to synchronize to the EMI_CLK.
Freescale Semiconductor, Inc.
1. Command passing through the port interface. (fixed)
2. Arbitration through the Arbiter. (fixed)
3. Placement into the Command Queue. (fixed)
4. Memory Command Generation. (variable)
5. Sending of control signals from the core logic to flip-flops near the I/O drivers. (fixed)
6. Flight time to the DRAM device. (variable)
7. Flight time from the DRAM device. (variable)
8. For reads, synchronization of read data from the data strobe domain. (fixed)
9. For reads, data pass through the port interface. (fixed)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Chapter 14 External Memory Interface (EMI)
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