MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1300
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1300 of 2327
- Download datasheet (17Mb)
Programmable Registers
HW_BCH_FLASH1LAYOUT1_WR(0x04408200);
Address:
Re-
16.6.12 Hardware BCH ECC Flash 2 Layout 0 Register
The flash format register contains a description of the logical layout of data on the flash
device. This register is used in conjuction with the FLASH2LAYOUT1 register to control
the format for the devices selecting layout 2 in the LAYOUTSELECT register.
Each pair of layout registers describes one of four supported flash configurations. Software
should program the LAYOUTSELECT register for each supported GPMI chip select to
select from one of the fourlayout values. Each pair of registers contains settings that are
used by the BCH block while reading/writing the flash page to control data, metadata, and
1300
set
Bit
W
R
DATAN_SIZE
PAGE_SIZE
31
0
31 16
15 12
ECCN
Field
11 0
30
0
29
0
HW_BCH_FLASH1LAYOUT1
(HW_BCH_FLASH2LAYOUT0)
28
1
Indicates the total size of the flash page (in bytes). This should be set to the page size including spare area.
The page size is programmable to accomodate different flash configurations that may be available in the
future.
Indicates the ECC level for the subsequent blocks on the flash page (blocks 1-n). Subsequent blocks only
contain data (no metadata).
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
Indicates the size of the subsequent data blocks (in bytes) to be stored on the flash page. The data size
MUST be a multiple of four bytes. The size of subsequent data blocks does not have to match the data size
for block 0, which is important when metadata is stored separately or for balancing the amount of data stored
in each block.
27
0
26
0
NONE — No ECC to be performed
ECC2 — ECC 2 to be performed
ECC4 — ECC 4 to be performed
ECC6 — ECC 6 to be performed
ECC8 — ECC 8 to be performed
ECC10 — ECC 10 to be performed
ECC12 — ECC 12 to be performed
ECC14 — ECC 14 to be performed
ECC16 — ECC 16 to be performed
ECC18 — ECC 18 to be performed
ECC20 — ECC 20 to be performed
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
PAGE_SIZE
HW_BCH_FLASH1LAYOUT1 field descriptions
24
0
23
1
22
1
21
0
20
8000_A000h base + B0h offset = 8000_A0B0h
1
19
1
18
0
17
1
16
0
15
1
Description
ECCN
14
0
13
0
12
0
11
0
10
0
1
9
0
8
Freescale Semiconductor, Inc.
DATAN_SIZE
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0
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