MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1626
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1626 of 2327
- Download datasheet (17Mb)
MAC Receive
If neither a hash match (group or individual) nor an exact match (group or individual) occur,
and if promiscuous mode is enabled (RCR[PROM] equals 1), the frame is accepted and the
MISS bit is set; otherwise, the frame is rejected.
This means the status bit is set in any of the following conditions during promiscuous mode:
26.3.7.5.1 Payload Length Check
If the Length / Type has a value lower than 0x600 and if the register bit NO_LGTH_CHECK
is configured to perform the check, the MAC checks the payload length and reports any
error in the frame status word (Bit 1 of Core signal ff_rx_err_stat(0) and interrupt bit PLR).
If the Length / Type field has a value greater or equal 0x600, the MAC interprets the field
as a type and no payload length check is performed.
The length check is performed on VLAN and stacked VLAN frames.
If a padded frame is received, no length check can be performed due to the extended frame
payload (that is, padded frames never can have a payload length error).
26.3.7.5.2 Frame Length Check
When the receive frame length exceeds MAX_FL bytes, the BABR interrupt bit is generated.
The LG register bit and ff_rx_err_stat(1) are set to '1'.
The frame is not truncated unless the frame length exceeds the value programmed in
TRUNC_FL. If the frame is truncated, ff_rx_err_stat(2) is set to '1'. In addition, a truncated
frame will always have the CRC error indication set (ff_rx_err_stat(3)).
1626
• BC_REJ=1. A broadcast frame is received in promiscuous mode while broadcast reject
• A unicast is received that does not match with any of the following:
• A multicast is received that does not match the GADDR1/2 hash table entries
is set.
(GALR/IAUR)
• PADDR1/ 2 (Node address, PALR/PAUR)
• SMAC_0/1/2/3 (supplemental unicast addresses)
• IADDR1/2 hash table entries (hash table for unicast, IALR/IAUR)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Freescale Semiconductor, Inc.
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