MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 857

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Address:
Freescale Semiconductor, Inc.
Reset
Reset
Bit
Bit
LFR_SEL
W
W
RSRVD6
RSRVD5
RSRVD4
DIV_SEL
RSRVD3
R
R
CP_SEL
31 30
29 28
27 26
25 24
23 22
21 20
Field
19
31
15
RSRVD6
0
0
HW_CLKCTRL_PLL0CTRL0 8004_0000h base + 0h offset = 8004_0000h
30
14
0
0
Always set to zero (0).
TEST MODE FOR FREESCALE USE ONLY. Adjusts loop filter resistor.
0x0
0x1
0x2
0x3
Always set to zero (0).
TEST MODE FOR FREESCALE USE ONLY. Adjusts charge pump current
0x0
0x1
0x2
0x3
Always set to zero (0).
TEST MODE FOR FREESCALE USE ONLY. This field is currently NOT supported.
0x0
0x1
0x2
0x3
Always set to zero (0).
LFR_SEL
29
13
0
0
DEFAULT — Default loop filter resistor
TIMES_2 — Doubles the loop filter resistor
TIMES_05 — Halves the loop filter resistor
UNDEFINED — Undefined
DEFAULT — Default charge pump current
TIMES_2 — Doubles charge pump current
TIMES_05 — Halves the charge pump current
UNDEFINED — Undefined
DEFAULT — PLL0 frequency is 480 Mhz
LOWER — Lower the PLL0 fequency from 480MHz to 384Mhz
LOWEST — Lower the PLL0 fequency from 480MHz to 288MHz
UNDEFINED — Undefined
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_CLKCTRL_PLL0CTRL0 field descriptions
28
12
0
0
27
11
RSRVD5
0
0
26
10
0
0
25
CP_SEL
0
0
9
RSRVD1[15:0]
24
0
0
8
Description
Chapter 10 Clock Generation and Control (CLKCTRL)
23
RSRVD4
0
0
7
22
0
0
6
21
DIV_SEL
0
5
0
20
0
4
0
19
0
0
3
USB_
CLKS
EN_
18
0
0
2
17
0
0
1
R S R V D 1
[16:16]
16
0
0
0
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