MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 806
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 806 of 2327
- Download datasheet (17Mb)
Programmable Registers
9.4.50 PINCTRL Bank 2 Data Input Register (HW_PINCTRL_DIN2)
The current value of all bank 2 pins may be read from the PINCTRL Bank 2 Data Input
Register.
HW_PINCTRL_DIN2: 0x920
HW_PINCTRL_DIN2_SET: 0x924
HW_PINCTRL_DIN2_CLR: 0x928
HW_PINCTRL_DIN2_TOG: 0x92C
This register reflects the current values of all the bank 2 pins. The register accurately reflects
the state of the pin regardless of the setting of the HW_PINCTRL_MUXSELx or
HW_PINCTRL_DOEx registers, but generally, if it is desired to use a pin as a general
purpose input, the pin's two bits in the HW_PINCTRL_MUXSELx register should be set
to 3 (GPIO mode) and the pin's bit in the HW_PINCTRL_DOEx register should be set to
0 (disabled) to insure that the chip is not driving the pin.
Address:
Re-
9.4.51 PINCTRL Bank 3 Data Input Register (HW_PINCTRL_DIN3)
The current value of all bank 3 pins may be read from the PINCTRL Bank 3 Data Input
Register.
HW_PINCTRL_DIN3: 0x930
HW_PINCTRL_DIN3_SET: 0x934
HW_PINCTRL_DIN3_CLR: 0x938
806
set
Bit
W
R
31
RSRVD1
0
31 28
RSRVD1
Field
27 0
DIN
30
0
29
0
HW_PINCTRL_DIN2
28
0
Empty Description.
Each bit in this read-only register corresponds to one of the 28 pins in bank 2. The current state of each pin
in bank 2, synchronized to HCLK, may be read here.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
23
0
HW_PINCTRL_DIN2 field descriptions
8001_8000h base + 920h offset = 8001_8920h
22
0
21
0
20
0
19
0
18
0
17
0
16
0
15
0
Description
14
0
DIN
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0
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