MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1460
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1460 of 2327
- Download datasheet (17Mb)
Programmable Registers
20.4.41 Shadow Register for OTP Bank4 Word6 (Data Use 6)
Copied from the OTP automatically after reset. Can be re-loaded by setting
HW_OCOTP_CTRL[RELOAD_SHADOWS].
Shadowed memory mapped access to OTP Bank 4, word 6 (ADDR = 0x26).
Address:
Re-
20.4.42 Shadow Register for OTP Bank4 Word7 (Data Use 7)
Copied from the OTP automatically after reset. Can be re-loaded by setting
HW_OCOTP_CTRL[RELOAD_SHADOWS].
Shadowed memory mapped access to OTP Bank 4, word 7 (ADDR = 0x27).
Address:
Re-
1460
set
set
Bit
Bit
W
W
R
R
31
31
0
0
Field
31 0
BITS
Field
31 0
BITS
30
30
0
0
29
29
0
0
HW_OCOTP_SRK6
HW_OCOTP_SRK7
(HW_OCOTP_SRK6)
(HW_OCOTP_SRK7)
28
28
0
0
Shadow register for the hash of the Super Root Key word6. If HAB is not required, these fuses can be used
for other purposes (Copy of OTP Bank 4, word 6 (ADDR = 0x26)). These bits become read-only after the
HW_OCOTP_LOCK[SRK_SHADOW] bit is set.
Shadow register for the hash of the Super Root Key word7. If HAB is not required, these fuses can be used
for other purposes (Copy of OTP Bank 4, word 7 (ADDR = 0x27)). These bits become read-only after the
HW_OCOTP_LOCK[SRK_SHADOW] bit is set.
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
24
24
0
0
23
23
0
0
HW_OCOTP_SRK6 field descriptions
HW_OCOTP_SRK7 field descriptions
8002_C000h base + 280h offset = 8002_C280h
8002_C000h base + 290h offset = 8002_C290h
22
22
0
0
21
21
0
0
20
20
0
0
19
19
0
0
18
18
0
0
17
17
0
0
16
16
0
0
BITS
BITS
15
15
0
0
Description
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
Freescale Semiconductor, Inc.
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
0
0
0
0
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