MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1128

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Programmable Registers
14.8.23 DRAM Control Register 25 (HW_DRAM_CTL25)
This is a DRAM configuration register.
Address:
Re-
14.8.24 DRAM Control Register 26 (HW_DRAM_CTL26)
This is a DRAM configuration register.
1128
set
Bit
POWER_DOWN_
REFRESH_CNT
W
R
LOWPOWER_
LOWPOWER_
LOWPOWER_
REFRESH_
OBSOLETE
31
0
SELF_
31 16
HOLD
31 16
Field
15 0
Field
15 0
CNT
30
0
29
0
HW_DRAM_CTL25
28
0
Counts idle cycles to memory self-refresh.
Counts the number of cycles to the next memory self-refresh low power mode.
Re-Sync counter for DLL in Clock Gate Mode.
Sets the number of cycles that the EMI will wait before attempting to re-lock the DLL when using the controller
clock gating mode low power mode. This counter will ONLY be used in this mode, the deepest low power
mode.
When this counter expires, the DLL will be un-gated for at least 16 cycles during which the DLL will attempt
to re-lock. After 16 cycles have elapsed and the DLL has locked, then the DLL controller clock will be gated
again and the counter will reset to this value. If the DLL requires more than 16 cycles to re-lock, then the
un-gated time will be longer.
Always write zeroes to this field.
Counts idle cycles to memory power-down.
Counts the number of idle cycles before memory power-down or power-down with memory clock gating low
power mode.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
OBSOLETE
24
0
23
0
HW_DRAM_CTL24 field descriptions
HW_DRAM_CTL25 field descriptions
800E_0000h base + 64h offset = 800E_0064h
22
0
21
0
20
0
19
0
18
0
17
0
16
0
15
0
Description
Description
14
0
13
0
LOWPOWER_POWER_DOWN_CNT
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0