MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1133

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

14.8.28 DRAM Control Register 30 (HW_DRAM_CTL30)
This is a DRAM configuration register.
Address:
Freescale Semiconductor, Inc.
Reset
Reset
COLUMN_SIZE
ADDR_PINS
OBSOLETE
Bit
Bit
APREBIT
W
W
R
R
RSVD2
RSVD1
RSVD3
18 16
15 11
31 24
23 19
Field
10 8
Field
7 4
3 0
31
15
0
0
HW_DRAM_CTL30
30
14
0
0
RSVD2
Difference between number of column pins available and number being used.
Shows the difference between the maximum column width available (12) and the actual number of column
pins being used. The user address is automatically shifted so that the user address space is mapped
contiguously into the memory map based on the value of this parameter.
Always write zeroes to this field.
Difference between number of addr pins available and number being used.
Defines the difference between the maximum number of address pins configured (15) and the actual number
of pins being used.
The user address is automatically shifted so that the user address space is mapped contiguously into the
memory map based on the value of this parameter.
Always write zeroes to this field.
Location of the auto pre-charge bit in the DRAM address.
Defines the location of the auto pre-charge bit in the DRAM address in decimal encoding.
Always write zeroes to this field.
Always write zeroes to this field.
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_DRAM_CTL29 field descriptions (continued)
OBSOLETE
28
12
0
0
800E_0000h base + 78h offset = 800E_0078h
HW_DRAM_CTL30 field descriptions
27
11
0
1
MAX_ROW_REG
26
10
0
1
25
0
1
9
24
0
1
8
Description
Description
23
0
0
7
22
0
0
6
RSVD1
Chapter 14 External Memory Interface (EMI)
RSVD3
21
0
5
0
20
0
4
0
19
0
1
3
MAX_COL_REG
18
1
1
2
MAX_CS_REG
17
0
0
1
1133
16
0
0
0