MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 671

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

9.2.1 Reset Configuration
Out of reset (hardware/software reset), all the pins (except JTAG related) are configured
as GPIO inputs with gate keepers enabled.
Here are some exceptions on general reset behavior:
.
9.2.2 Pin Interface Multiplexing
The device is designed for cost sensitive applications. It contains a rich set of specialized
hardware interfaces (mDDR, NAND Flash, LCD panels, many types of insertable media,
and so on), but does not have enough pins to allow use of all signals of all the interfaces
simultaneously. Consequently, a pin multiplexing scheme is used to allow customers to
choose which specialized interfaces to enable for their application. In addition to these
specialized hardware interfaces, the device allows many digital pins to be used as GPIOs.
Freescale Semiconductor, Inc.
• Ethernet pins works differently, they will only reset when power is on. Software reset
• EMI pins do not mux with GPIO function. So after reset, configure as GPIO means it
will not affect them. This is to make sure that the enet switch can still work during
software reset.
is disabled.
GPIO Output Enable
GPIO Output
GPIO Input
HARDWARE_FUNCTION_DOE0
HARDWARE_FUNCTION_DOE1
HARDWARE_FUNCTION_DOE2
HARDWARE_FUNCTION_DO0
HARDWARE_FUNCTION_DO1
HARDWARE_FUNCTION_DO2
HW_PINCTRL_MUXSELx
HW_PINCTRL_DOUTx
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_PINCTRL_DOEx
HARDWARE_FUNCTION_DI0
HARDWARE_FUNCTION_DI1
HARDWARE_FUNCTION_DI2
HW_PINCTRL_MUXSELx
HW_PINCTRL_DINx
Figure 9-1. Pad Diagram
OE#
EN
EN
Drive
Strength
HW_PINCTRL_DRIVEx
OUTPUT
PAD
INPUT
10 K
or
47 K
Pad Power
Chapter 9 Pin Control and GPIO (PinCtrl)
Integrated Pull-up (available only on
certain pins). Enabling the internal
pull-up disables the Gate Keeper.
Pad Power
HW_PINCTRL_PULLx
Gate Keeper.
Note external 47K ( or
stronger) pull-ups or
pull-downs are needed
to overdrive Gate Keepers
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