MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1405

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Address:
Re-
19.4.48 AHB Layer 3 Performance Metric for Stalled Bus Cycles Register
Used for AHB bus utilization measurements, the AHB Performance Metric for Stalled Bus
Cycles Register counts the number of stalled AHB cycles.
This counter increments on a data-phase of the AHB in which the HREADY signal is low,
indicating a stalled data transfer.
EXAMPLE
NumberStalledCycles = HW_DIGCTL_L3_AHB_DATA_STALLED_COUNT_RD();
Address:
Re-
Freescale Semiconductor, Inc.
set
set
Bit
Bit
W
W
R
R
31
31
0
0
COUNT
COUNT
Field
31 0
Field
31 0
30
30
0
0
29
29
0
0
HW_DIGCTL_L3_AHB_ACTIVE_CYCLES
8001_C3D0h
HW_DIGCTL_L3_AHB_DATA_STALLED
8001_C3E0h
(HW_DIGCTL_L3_AHB_DATA_STALLED)
28
28
0
0
This field contains the count of AHB bus cycles during which a master was active on the AHB Layer 3.
This field counts the number of AHB cycles in which a master was stalled.
27
27
0
0
HW_DIGCTL_L3_AHB_ACTIVE_CYCLES field descriptions
HW_DIGCTL_L3_AHB_DATA_STALLED field descriptions
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
24
24
0
0
23
23
0
0
22
22
0
0
21
21
0
0
20
20
0
0
19
19
0
0
18
18
0
0
17
17
8001_C000h base + 3E0h offset =
0
0
8001_C000h base + 3D0h offset =
COUNT
COUNT
16
16
0
0
15
15
0
0
Description
Description
Chapter 19 Digital Control (DIGCTL) and On-Chip RAM
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
1405
0
0
0
0

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