MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 116

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

JTAG Debugger
2.3 JTAG Debugger
The TAP controller of the ARM core in the i.MX28 performs the standard debugger
instructions.
2.3.1 JTAG READ ARM ID (TAP)
The TAP controller returns the following 32-bit data value in response to a JTAG READ
ID instruction: 0x079264F3 when the pin DEBUG=1 (JTAG interface works for ARM
debugging).
2.3.2 JTAG Hardware Reset
The JTAG reset instruction can be accomplished by writing 0xDEADC0DE to ETM address
0x70. The ETM is on scan chain 6. The bitstream is 0xF0DEADC0DE. The digital wide
reset does not affect the DC-DC converters or the contents of the persistent registers in the
analog side of the RTC.
2.3.3 JTAG Interaction with CPUCLK
Because the JTAG clock is sampled from the processor clock CPUCLK, there are cases in
which the behavior of CPUCLK affects the ability to make use of JTAG. Specifically, the
JTAG block will not function as expected if:
2.4 Embedded Trace Macrocell (ETM) Interface
The i.MX28 includes a stand-alone ARM CoreSight Embedded Trace Macrocell,
ETM9CSSingle, which provides a instruction trace and a data trace for the ARM9
microprocessor. For more details, see the CoreSight ETM9 Technical Reference Manual.
Also, see the pin list in the data sheet for pinout information.
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• CPUCLK is stalled due to an interrupt
• CPUCLK is less than 3x the JTAG clock
• CPUCLK is disabled for any reason
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Freescale Semiconductor, Inc.