MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 580

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Programmable Registers
7.5.62 APBX DMA Channel 8 Current Command Address Register
The APBX DMA Channel 8 current command address register points to the multiword
command that is currently being executed. Commands are threaded on the command address.
APBX DMA Channel 8 is controlled by a variable sized command structure. This register
points to the command structure currently being executed.
Address:
Re-
7.5.63 APBX DMA Channel 8 Next Command Address Register
The APBX DMA Channel 8 next command address register points to the next multiword
command to be executed. Commands are threaded on the command address. Set CHAIN
to one to process command lists.
APBX DMA Channel 8 is controlled by a variable sized command structure. Software loads
this register with the address of the first command structure to process and increments the
Channel 8 semaphore to start processing. This register points to the next command structure
to be executed when the current command is completed.
580
set
Bit
W
R
AHB_BYTES
APB_BYTES
CMD_ADDR
31
0
31 16
Field
15 0
Field
31 0
30
0
29
0
(HW_APBX_CH8_CURCMDAR)
(HW_APBX_CH8_NXTCMDAR)
HW_APBX_CH8_CURCMDAR
28
0
This value reflects the current number of APB bytes remaining to be transfered in the current transfer.
This value reflects the current number of AHB bytes remaining to be transfered in the current transfer.
Pointer to command structure currently being processed for Channel 8.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
HW_APBX_CH8_CURCMDAR field descriptions
24
HW_APBX_CH7_DEBUG2 field descriptions
0
23
0
22
0
21
0
20
0
8002_4000h base + 480h offset = 8002_4480h
19
0
18
0
17
CMD_ADDR
0
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0

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