MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2159

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

EXAMPLE
HW_PXP_S0BACKGROUND_WR(0x00000000);
HW_PXP_S0BACKGROUND_WR(0x00800000);
HW_PXP_S0BACKGROUND_WR(0x00008000);
HW_PXP_S0BACKGROUND_WR(0x00000080);
Address:
Re-
34.4.11 Source 0 Cropping Register (HW_PXP_S0CROP)
This register contains controls for image/video cropping. XBASE and YBASE select the
origin of the S0 buffer for PXP operations. The WIDTH and HEIGHT determine the visible
size of the selected region in the output frame buffer. Software should program the input
framebuffer cropped width/height values into these fields. Cropping is applied in the output
buffer, therefore after any scaling operations. Scaled regions may need to be cropped to
avoid artifacts at the edge of a scaled region.
The cropping register can be used to specify cropping extents for S0 plane in the output
buffer. It is only used if the CROP bit is set in the PXP_CTRL register is set. When this bit
is not set, no cropping of the input image will be performed and the PXP will default to
using the S0 WIDTH and HEIGHT parameters. Cropping should always be used when
scaling images since the PXP cannot determine the scaled image size. In 16 pixel block size
mode, only the low 7 bits of each field can be used and the most significant bit must be set
to 0.
EXAMPLE
HW_PXP_S0CROP_WR(0x02021810);
Freescale Semiconductor, Inc.
set
Bit
W
R
31
0
COLOR
Field
31 0
30
0
29
0
HW_PXP_S0BACKGROUND
28
0
Background color (in 32bpp format) for any pixels not in the S0 buffer range specified in the S0SIZE register.
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
HW_PXP_S0BACKGROUND field descriptions
24
0
23
0
22
0
// S0 origin is at (16,16) -- 0x0202
// output width is 192 (0x18->24*8=192 pixels)
// output height is 128 (0x10->16*8=128 pixels)
21
0
20
0
8002_A000h base + 90h offset = 8002_A090h
// letterbox is black
// letterbox is dark red
// letterbox is dark green
// letterbox is dark blue
19
0
18
0
17
0
COLOR
16
0
15
0
Description
14
0
13
0
12
0
11
0
10
0
0
9
Chapter 34 Pixel Pipeline (PXP)
0
8
0
7
0
6
0
5
0
4
3
0
0
2
0
1
2159
0
0