MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1831
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MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
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If no output port is left in the list of outputs, the frame is discarded.
If a frame switched to port N, the counter ODISCN is incremented.
29.4.10.8 Switching
After the output port(s) have been determined, the switch control enables the corresponding
path though the Switch Matrix and the frame is forwarded to the output queue(s).
In a similar fashion, if a Frame should be switched to multiple ports (for example, Broadcast),
the switch control enables the corresponding paths though the Switch Matrix and the frame
is forwarded to all the destination output ports.
29.5 Output Frame Queuing
29.5.1 Overview
The memory controller implements a shared memory architecture to store Frames of arbitrary
size for multiple destination ports.
Each destination port implements 4 priority queues. The memory controller implements a
single write input port and three output ports with the capability to perform virtual frame
duplication on the output ports (Multiple reads on multiple ports of a single frame stored
in the buffer).
A single large memory, partitioned in 256 byte cells, is implemented to efficiently share
the available space for small and large frames without leaving large unused spaces when
storing small frames.
Freescale Semiconductor, Inc.
If any of the outputs cannot accept a frame (as indicated by the output queue management
for the port, implementation specific) it is also removed from the list of outputs.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
1831
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