MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 954

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

OTP eFuse and Persistent Bit Definitions
954
HW_OCOTP_ROM1:0x8002C1B0:30
HW_OCOTP_ROM1:0x8002C1B0:29
HW_OCOTP_ROM1:0x8002C1B0:28
HW_OCOTP_ROM1:0x8002C1B0:27
HW_OCOTP_ROM1:0x8002C1B0:26
HW_OCOTP_ROM1:0x8002C1B0:25
HW_OCOTP_ROM1:0x8002C1B0:24
HW_OCOTP_ROM1:0x8002C1B0:23
HW_OCOTP_ROM1:0x8002C1B0:22
HW_OCOTP_ROM1:0x8002C1B0:21
HW_OCOTP_ROM1:0x8002C1B0:20
HW_OCOTP_ROM1:0x8002C1B0:19
HW_OCOTP_ROM1:0x8002C1B0:18
HW_OCOTP_ROM1:0x8002C1B0:17
HW_OCOTP_ROM1:0x8002C1B0:16
HW_OCOTP_ROM1:0x8002C1B0:15
HW_OCOTP_ROM1:0x8002C1B0:14
HW_OCOTP_ROM1:0x8002C1B0:13
eFuse
Bank:Address:Bit
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 12-4. NAND/SD-MMC-Related Bits
DISABLE_SECONDARY_BOOT - Blow this bit to disable the secondary boot.
SSP3_EXT_PULLUP - This bit is blown to enable external pull up of SSP3 signals.
SSP2_EXT_PULLUP - This bit is blown to enable external pull up of SSP2 signals.
ENABLE_NAND7_CE_RDY_PULLUP - If the bit is blown then ROM NAND driver
will enable internal pull-up for GPMI_CE7 and GPMI_RDY7 pins.
ENABLE_NAND6_CE_RDY_PULLUP - If the bit is blown then ROM NAND driver
will enable internal pull-up for GPMI_CE6 and GPMI_RDY6 pins.
ENABLE_NAND5_CE_RDY_PULLUP - If the bit is blown then ROM NAND driver
will enable internal pull-up for GPMI_CE5 and GPMI_RDY5 pins.
ENABLE_NAND4_CE_RDY_PULLUP - If the bit is blown then ROM NAND driver
will enable internal pull-up for GPMI_CE4 and GPMI_RDY4 pins.
ENABLE_NAND3_CE_RDY_PULLUP - If the bit is blown then ROM NAND driver
will enable internal pull-up for GPMI_CE3 and GPMI_RDY3 pins.
ENABLE_NAND2_CE_RDY_PULLUP - If the bit is blown then ROM NAND driver
will enable internal pull-up for GPMI_CE2 and GPMI_RDY2 pins.
ENABLE_NAND1_CE_RDY_PULLUP - If the bit is blown then ROM NAND driver
will enable internal pull-up for GPMI_CE1 and GPMI_RDY1 pins.
ENABLE_NAND0_CE_RDY_PULLUP - If the bit is blown then ROM NAND driver
will enable internal pull-up for GPMI_CE0 and GPMI_RDY0 pins.
UNTOUCH_INTERNAL_SSP_PULLUP - If this bit is blown then internal pull-ups
for SSP are neither enabled nor disabled. This bit is used only if the external pull-
ups are implemented and ROM1:18 and/or ROM1:17 are blown.
SSP1_EXT_PULLUP - Blow to indicate external pull-ups implemented for SSP1.
SSP0_EXT_PULLUP - Blow to indicate external pull-ups implemented for SSP0.
SD_INCREASE_INIT_SEQ_TIME - Blow to increase the SD card initialization se-
quence time from 1 ms (default) to 4 ms.
SD_INIT_SEQ_2_ENABLE - Blow to enable the second initialization sequence for
SD boot.
SD_CMD0_DISABLE - Cmd0 (reset cmd) is called by default to reset the SD card
during startup. Blow this bit to not to reset the card during SD boot.
SD_INIT_SEQ_1_DISABLE - Blow to disable the first initialization sequence for
SD.
eFuse Function
Freescale Semiconductor, Inc.