MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2177

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

34.4.31 PXP Overlay 1 Parameters (HW_PXP_OL1PARAM)
This register contains buffer parameters for the Overlay 1 input buffer.
The S1 Overlay 1 Parameter register provides additional controls for Overlay 1.
EXAMPLE
u32 olparam;
HW_PXP_OLnPARAM_WR(1,olparam);
Address:
Freescale Semiconductor, Inc.
Reset
Reset
Bit
Bit
W
W
HEIGHT
R
R
YBASE
RSVD1
WIDTH
23 16
31 20
19 16
Field
15 8
Field
ROP
7 0
olparam
olparam |= BF_PXP_OLnPARAM_ALPHA_CNTL(BV_PXP_OLnPARAM_ALPHA_CNTL__ROPs);
olparam |= BF_PXP_OLnPARAM_FORMAT
olparam |= BF_PXP_OLnPARAM_ROP
31
15
0
0
HW_PXP_OL1PARAM
30
14
0
0
This field indicates the Y-coordinate (in blocks) of the top-left NxN block in the overlay within the output
frame buffer.
Indicates number of horizontal NxN blocks in the image (non-rotated).
Indicates the number of vertical NxN blocks in the image (non-rotated).
Reserved, always set to zero.
Indicates a raster operation to perform when enabled. Raster operations are enabled through the
ALPHA_CNTL field.
= BF_PXP_OLnPARAM_ENABLE
29
13
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_PXP_OL1SIZE field descriptions (continued)
28
12
0
0
ALPHA
HW_PXP_OL1PARAM field descriptions
27
11
8002_A000h base + 260h offset = 8002_A260h
0
0
// enable overlay to perform XOR ROP using RGB8888 overlay
26
10
0
0
RSVD1
25
0
0
9
(1);
(BV_PXP_OLnPARAM_FORMAT__ARGB8888);
(BV_PXP_OLnPARAM_ROP__XOROL);
24
0
0
8
Description
Description
23
0
0
7
22
FORMAT
0
0
6
21
0
5
0
20
0
4
0
Chapter 34 Pixel Pipeline (PXP)
19
0
0
3
18
0
0
2
ALPHA_
CNTL
ROP
17
0
0
1
2177
16
0
0
0