MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1254
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1254 of 2327
- Download datasheet (17Mb)
Programmable Registers
15.4.9 GPMI Timing Register 1 (HW_GPMI_TIMING1)
The GPMI timing register 1 specifies the timeouts used when monitoring the NAND READY
pin and IOWAIT signals.
Address:
Re-
15.4.10 GPMI DMA Data Transfer Register (HW_GPMI_DATA)
The GPMI DMA data transfer register is used by the DMA to read or write data to or from
the NAND control state machine.
1254
set
Bit
DEVICE_BUSY_
W
R
DATA_SETUP
DATA_HOLD
ADDRESS_
TIMEOUT
31
0
RSVD0
SETUP
RSVD0
31 24
23 16
31 16
Field
15 8
Field
15 0
7 0
30
0
29
0
HW_GPMI_TIMING1
28
0
Always write zeroes to this bit field.
Number of GPMICLK cycles that the CE/ADDR signals are active before a strobe is asserted. A value of
zero is interpreted as 0.
Data bus hold time in GPMICLK cycles. Also the time that the data strobe is de-asserted in a cycle. A value
of zero is interpreted as 256.
Data bus setup time in GPMICLK cycles. Also the time that the data strobe is asserted in a cycle. A value
of zero is interpreted as 256.
Timeout waiting for NAND Ready/Busy. Used in WAIT_FOR_READY mode. This value is the number of
GPMI_CLK cycles multiplied by 4096.
Always write zeroes to this bit field.
27
0
DEVICE_BUSY_TIMEOUT
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
23
0
HW_GPMI_TIMING0 field descriptions
HW_GPMI_TIMING1 field descriptions
8000_C000h base + 80h offset = 8000_C080h
22
0
21
0
20
0
19
0
18
0
17
0
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
RSVD0
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0
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