MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2165

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Address:
Re-
34.4.17 PXP Next Frame Pointer (HW_PXP_NEXT)
This register contains a pointer to a data structure used to reload the PXP registers at the
end of the current frame.
HW_PXP_NEXT: 0x100
HW_PXP_NEXT_SET: 0x104
HW_PXP_NEXT_CLR: 0x108
HW_PXP_NEXT_TOG: 0x10C
To enable this functionality, software must write this register while the PXP is processing
the current data frame (if the PXP is currently idle, this will also initiate an immediate load
of registers from the pointer). The process of writing this register (WRITE operation) will
set a semaphore in hardware to notify the control logic that a register reload operation must
be performed when the current frame processing is complete. At the end of a frame, the
PXP will fetch the register settings from this location, signal an interrupt to software, then
proceed with rendering the next frame of data. Software may cancel the reload operation
by issuing a CLEAR operation to this register. SET and TOGGLE operations should not
be used when addressing this register. All registers will be reloaded with the exception of
the following: STAT, CSCCOEFFn, NEXT, VERSION. All other registers will be loaded
Freescale Semiconductor, Inc.
set
Bit
W
R
31
0
RSVD1
RSVD0
31 27
26 16
15 11
Field
10 0
C2
C3
30
0
RSVD1
29
0
HW_PXP_CSCCOEFF2
28
0
Reserved, always set to zero.
Two's compliment Green V/Cr multiplier coefficient. YUV=0x76B (-0.581) YCbCr=0x730 (-0.813)
Reserved, always set to zero.
Two's compliment Green U/Cb multiplier coefficient. YUV=0x79C (-0.394) YCbCr=0x79C (-0.392)
27
0
26
1
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
1
24
1
HW_PXP_CSCCOEFF2 field descriptions
23
1
22
0
8002_A000h base + F0h offset = 8002_A0F0h
C2
21
0
20
1
19
1
18
0
17
1
16
1
15
0
Description
14
0
RSVD0
13
0
12
0
11
0
10
1
1
9
Chapter 34 Pixel Pipeline (PXP)
1
8
0
7
1
6
C3
1
5
0
4
3
1
1
2
0
1
2165
0
0