MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1301

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
flash page sizes as well as the ECC correction level. The first block written to flash can be
programmed to have different ECC, metadata, and data sizes from subsequent data blocks
on the device. In addition, the number of blocks stored on a page of flash is not fixed, but
instead is determined by the number of bytes consumed by the initial (block 0) and
subsequent data blocks. See the BCH programming reference manual for more information
on setting up the flash layout registers.
EXAMPLE
HW_BCH_FLASH2LAYOUT0_WR(0x020C8000);
HW_BCH_FLASH2LAYOUT1_WR(0x04408200);
Address:
Re-
Freescale Semiconductor, Inc.
set
Bit
W
R
DATA0_SIZE
META_SIZE
NBLOCKS
31
0
31 24
23 16
15 12
ECC0
Field
11 0
30
0
29
0
NBLOCKS
HW_BCH_FLASH2LAYOUT0
28
0
Number of subsequent blocks on the flash page (excluding the data0 block). A value of 0 indicates that only
the DATA0 block is present and a value of 8 indicates that 8 subsequent blocks are present for a total of 9
blocks on the flash (including the DATA0 block). Any values from 0 to 255 are supported by the hardware.
Indicates the size of the metadata (in bytes) to be stored on a flash page. The BCH design support from 0
to 255 bytes for metadata -- if set to zero, no metadata will be stored. Metadata is stored before the associated
data in block 0. If the DATA0_SIZE field is programmed to a zero, then metadata effectively be stored with
its own parity. When both the metadata and data0 fields are programmed with non-zero values, the first
block will contain both portions of data and will be covered by a single parity block.
Indicates the ECC level for the first block on the flash page. The first block covers metadata plus the
associated data from the DATA0_SIZE field.
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9
0xA
Indicates the size of the data 0 block (in bytes) to be stored on the flash page. The data size MUST be a
multiple of four bytes. If set to zero, the first block will only contain metadata.
27
0
26
1
NONE — No ECC to be performed
ECC2 — ECC 2 to be performed
ECC4 — ECC 4 to be performed
ECC6 — ECC 6 to be performed
ECC8 — ECC 8 to be performed
ECC10 — ECC 10 to be performed
ECC12 — ECC 12 to be performed
ECC14 — ECC 14 to be performed
ECC16 — ECC 16 to be performed
ECC18 — ECC 18 to be performed
ECC20 — ECC 20 to be performed
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
1
HW_BCH_FLASH2LAYOUT0 field descriptions
24
1
23
0
22
0
21
0
META_SIZE
20
8000_A000h base + C0h offset = 8000_A0C0h
0
19
1
18
0
17
1
16
0
15
1
Description
Chapter 16 20-BIT Correcting ECC Accelerator (BCH)
ECC0
14
0
13
0
12
0
11
0
10
0
1
9
0
8
DATA0_SIZE
0
7
0
6
0
5
0
4
3
0
0
2
0
1
1301
0
0

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