MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2041

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

32.4.2 USB PHY Transmitter Control Register (HW_USBPHY_TX)
The USB PHY Transmitter Control Register handles the transmit controls.
HW_USBPHY_TX: 0x010
HW_USBPHY_TX_SET: 0x014
Freescale Semiconductor, Inc.
TXPWDIBIAS
RXPWD1PT1
RXPWDENV
TXPWDV2I
TXPWDFS
RSVD1
RSVD0
16 13
Field
9 0
18
17
12
11
10
0 = Normal operation.
1 = Power-down the USB full-speed differential receiver.
Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of
HW_USBPHY_CTRL is enabled.
0 = Normal operation.
1 = Power-down the USB high-speed receiver envelope detector (squelch signal).
Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of
HW_USBPHY_CTRL is enabled.
Reserved.
0 = Normal operation.
1 = Power-down the USB PHY transmit V-to-I converter and the current mirror.
Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of
HW_USBPHY_CTRL is enabled.
Note that these circuits are shared with the battery charge circuit. Setting this to 1 does not power-down
these circuits, unless the corresponding bit in the battery charger is also set for power-down.
0 = Normal operation.
1 = Power-down the USB PHY current bias block for the transmitter. This bit should be set only when the
USB is in suspend mode. This effectively powers down the entire USB transmit path.
Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of
HW_USBPHY_CTRL is enabled.
Note that these circuits are shared with the battery charge circuit. Setting this bit to 1 does not power-down
these circuits, unless the corresponding bit in the battery charger is also set for power-down.
0 = Normal operation.
1 = Power-down the USB full-speed drivers. This turns off the current starvation sources and puts the drivers
into high-impedance output.
Note that this bit will be auto cleared if there is USB wakeup event while ENAUTOCLR_PHY_PWD bit of
HW_USBPHY_CTRL is enabled.
Reserved.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_USBPHY_PWD field descriptions (continued)
Description
Chapter 32 Integrated USB 2.0 PHY
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