MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 11

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Section Number
Freescale Semiconductor, Inc.
6.5.12
6.5.13
6.5.14
6.5.15
6.5.16
6.5.17
6.5.18
6.5.19
6.5.20
6.5.21
6.5.22
6.5.23
6.5.24
6.5.25
6.5.26
6.5.27
6.5.28
6.5.29
6.5.30
6.5.31
6.5.32
6.5.33
6.5.34
6.5.35
6.5.36
6.5.37
6.5.38
6.5.39
APBH DMA Channel 0 Semaphore Register (HW_APBHCH0_SEMA)................................................376
AHB to APBH DMA Channel 0 Debug Information (HW_APBHCH0_DEBUG1)...............................377
AHB to APBH DMA Channel 0 Debug Information (HW_APBHCH0_DEBUG2)...............................380
APBH DMA Channel 1 Current Command Address Register (HW_APBHCH1_CURCMDAR)..........380
APBH DMA Channel 1 Next Command Address Register (HW_APBHCH1_NXTCMDAR)...............381
APBH DMA Channel 1 Command Register (HW_APBHCH1_CMD)...................................................382
APBH DMA Channel 1 Buffer Address Register (HW_APBHCH1_BAR).............................................384
APBH DMA Channel 1 Semaphore Register (HW_APBHCH1_SEMA)................................................385
AHB to APBH DMA Channel 1 Debug Information (HW_APBHCH1_DEBUG1)...............................386
AHB to APBH DMA Channel 1 Debug Information (HW_APBHCH1_DEBUG2)...............................388
APBH DMA Channel 2 Current Command Address Register (HW_APBHCH2_CURCMDAR)..........389
APBH DMA Channel 2 Next Command Address Register (HW_APBHCH2_NXTCMDAR)...............389
APBH DMA Channel 2 Command Register (HW_APBHCH2_CMD)...................................................390
APBH DMA Channel 2 Buffer Address Register (HW_APBHCH2_BAR).............................................392
APBH DMA Channel 2 Semaphore Register (HW_APBHCH2_SEMA)................................................393
AHB to APBH DMA Channel 2 Debug Information (HW_APBHCH2_DEBUG1)...............................393
AHB to APBH DMA Channel 2 Debug Information (HW_APBHCH2_DEBUG2)...............................396
APBH DMA Channel 3 Current Command Address Register (HW_APBHCH3_CURCMDAR)..........396
APBH DMA Channel 3 Next Command Address Register (HW_APBHCH3_NXTCMDAR)...............397
APBH DMA Channel 3 Command Register (HW_APBHCH3_CMD)...................................................398
APBH DMA Channel 3 Buffer Address Register (HW_APBHCH3_BAR).............................................400
APBH DMA Channel 3 Semaphore Register (HW_APBHCH3_SEMA)................................................400
AHB to APBH DMA Channel 3 Debug Information (HW_APBHCH3_DEBUG1)...............................401
AHB to APBH DMA Channel 3 Debug Information (HW_APBHCH3_DEBUG2)...............................403
APBH DMA Channel 4 Current Command Address Register (HW_APBHCH4_CURCMDAR)..........404
APBH DMA Channel 4 Next Command Address Register (HW_APBHCH4_NXTCMDAR)...............405
APBH DMA Channel 4 Command Register (HW_APBHCH4_CMD)...................................................405
APBH DMA Channel 4 Buffer Address Register (HW_APBHCH4_BAR).............................................407
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
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