MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1859

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

29.9.15 ENET SWI Port Mirroring Egress port definitions.
1 Bit per Port. If enabled (Bit=1) frames destined to the port(s) are mirrored to the mirror
port
Address:
Freescale Semiconductor, Inc.
Reset
Reset
MIRROR_EG_
MIRROR_EG_
MIRROR_EG_
MIRROR_
Bit
Bit
W
W
RSRVD0
ENABLE
R
R
PORTX
MAP_2
MAP_1
MAP_0
Field
Field
31 3
3 0
4
2
1
0
31
15
0
0
HW_ENET_SWI_MIRROR_EG_MAP
800F_8044h
HW_ENET_SWI_MIRROR_CONTROL field descriptions (continued)
(HW_ENET_SWI_MIRROR_EG_MAP)
30
14
0
0
Enable (1) / Disable (0) mirroring.
The port number of the port that should act as the mirror port and receive all mirrored frames.
Reserved bits. Write as 0.
port 2.
port 1.
port 0.
29
13
HW_ENET_SWI_MIRROR_EG_MAP field descriptions
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
27
11
0
0
26
10
0
0
RSRVD0[15:3]
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
25
800F_8000h base + 44h offset =
0
0
9
RSRVD0[31:16]
24
0
0
8
Description
Description
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
19
0
0
3
18
0
0
2
17
0
0
1
1859
16
0
0
0