MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 2219

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MCIMX281AVM4B

Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets

Specifications of MCIMX281AVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
Once a complete set of left samples resides within the bottom of the active FIFOs, the SAIF
waits for the current collection of null samples (all left and right samples for a given time)
to complete before transmitting the left sample collection from the FIFOs.
EXAMPLE
channel in 32 bit per sample mode.
Address:
Re-
35.3.4 SAIF Version Register (HW_SAIF_VERSION)
The SAIF Version Register is read-only and is used for debug to determine the
implementation version number for the block.
EXAMPLE
if (HW_SAIF_VERSION.B.MAJOR != 1)
Address:
Re-
Freescale Semiconductor, Inc.
set
set
Bit
Bit
W
W
the left channel in 16 bit mode
R
R
PCM_RIGHT
PCM_LEFT
Error();
31
31
0
0
31 16
Field
15 0
30
30
0
0
29
29
0
0
MAJOR
HW_SAIF_DATA
HW_SAIF_VERSION
28
28
0
0
For 16-bit mode, this field contains the entire right channel sample.
For 17-bit through 24-bit modes, this field contains 1 through 8 of the MSBs of the sample (either left or
right).
For 16-bit mode, this field contains the entire left channel sample.
For 17-bit through 24-bit modes, this field contains the 16 LSBs of the sample (either left or right).
27
27
0
0
HW_SAIF_DATA = 0x12345678; // write 0x1234 to the right channel and 0x5678 to
HW_SAIF_DATA = 0x12345678; // write 0x12345678 to either the left or right
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
PCM_RIGHT
0
0
24
24
0
1
8004_2000h base + 20h offset = 8004_2020h
23
23
0
0
HW_SAIF_DATA field descriptions
22
8004_2000h base + 30h offset = 8004_2030h
22
0
0
21
21
0
0
MINOR
20
20
0
0
19
19
0
0
18
18
0
0
17
17
0
0
16
16
0
1
15
15
0
0
Description
14
14
0
0
13
13
0
0
12
12
0
0
11
11
0
0
Chapter 35 Serial Audio Interface (SAIF)
10
10
0
0
0
0
9
9
PCM_LEFT
STEP
0
0
8
8
0
0
7
7
0
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
2219
0
0
0
0

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