MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1016

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Operation
For various error conditions, the DCP encodes additional error information in the
ERROR_CODE field. See
codes. For any completion codes besides the COMPLETE flag, the channel suspends
processing the command chain until the error status values are cleared in the channel status
register.
The format for this field is same as the channel status register, with the exception that the
COMPLETE bit is written to the payload status but is not present in the channel status
register.
13.2.6.4.9 Payload
The payload is a variable-length field that is used to provide key, initialization values, and
expected results from hashing operations. The payload may consist of the data fields listed
in the following table.
If fields are not used, they do not appear in the payload and the other payload values move
upwards in the payload area. For instance, if only hashing is used, then the HASH_CHECK
value would appear at offset 0 in the payload area. The following table should be used by
software to determine the amount of payload to allocate and initialize.
1016
31
Cipher Key
Cipher IV
Hash Check
FIELD NAME
30
HASH_CHECK
29
28
0
TAG
27
26
25
16 bytes
16 bytes
20 bytes
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
SIZE
CONTROL BITS PRESENT
Table 13-13. DCP Payload Allocation by Software
24
23
CIPHER_INIT
Programmable Registers
22
ERROR_CODE
21
0
Table 13-12. DCP Payload Field
Table 13-11. DCP Status Field
20
AES key
CBC initialization vector
Hash completion value
DESCRIPTION
19
18
17
16
PAYLOAD_KEY
15
14
0
for more details on assignments of error
13
12
Cipher enable with PAYLOAD_KEY
Cipher enable with CBC mode.
Hash enabled with HASH_TERM fields set.
CONDITION
11
10
09
08
07
Freescale Semiconductor, Inc.
0 words / 0 bytes
PAYLOAD SIZE
06
05
04
03
02
01
00