MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1811

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

29.3.5 Port 0 Input Backpressure/Congestion Indication
When frames are transferred from DMA0 to the switch port0 transmit interface, the interface
signal ff_tx_rdy0 indicates if data can be transferred (written) to the port 0 input. When
ff_tx_rdy0 deasserts (0), it indicates a stop request to the DMA0. The DMA0 might continue
to write a few more words (typically up to 4) and is then expected to stop writing and wait
for assertion (1) of the signal again. The signal is controlled by the port 0 local input buffer
and deasserts when the buffer reaches an almost full threshold.
In addition, a special backpressure mechanism for Port0 is implemented to pause DMA0
transfers when the output queues' shared memory (see Overview) becomes full to a
programmable threshold. Respecting the output queues' shared memory fill level can avoid
that the switch due to memory congestion discards frames written by the DMA0. The
threshold is configured through
is used as follows:
If the shared memory has less than QMGR_MINCELLSP0 number of free cells available,
the switch stops serving port 0. That is, the switch will not start to read a frame from the
port0 input buffer. The port 0 input buffer will continue to accept data from DMA0 until it
becomes full and as a result deasserts ff_tx_rdy0.
Note that the backpressure only considers the total amount of memory available, not a
specific queue. Hence, it may still happen that an outgoing frame from DMA0 is discarded
by the switch, if the output queue for the frame is congested while the total amount of
memory would have free space available.
The backpressure threshold (QMGR_MINCELLSP0) should be set higher than the memory
full threshold (QMGR_MINCELLS) to stop the DMA0 before a memory full situation,
leading to discard of frames, can occur.
29.4 Switch Functional Description
29.4.1 Overview
The Switch implements the following main functions:
Freescale Semiconductor, Inc.
• Input/Output VLAN Processing
• IP Snooping
• Input Frame Parsing and Priority Extraction
• Input Port Selection
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
QMGR_MINCELLSP0
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
configuration register. The threshold
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