MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1931
MCIMX281AVM4B
Manufacturer Part Number
MCIMX281AVM4B
Description
IC MPU I.MX28 1.2 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(2327 pages)
2.MCIMX283DVM4B.pdf
(20 pages)
3.MCIMX281AVM4B.pdf
(72 pages)
Specifications of MCIMX281AVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Supplier Unconfirmed
- Current page: 1931 of 2327
- Download datasheet (17Mb)
29.9.110 ENET SWI Pointer to Receive Descriptor Ring
Pointer to Receive Descriptor Ring. Only Bits 31:2 are writeable. 1:0 always 0.
Address:
Freescale Semiconductor, Inc.
Reset
Reset
Bit
Bit
W
W
R
R
EBERR
Field
OD1
OD0
RXF
RXB
TXF
TXB
QM
7
6
5
4
3
2
1
0
31
15
0
0
HW_ENET_SWI_ERDSR 800F_8000h base + 408h offset = 800F_8408h
30
14
0
0
(HW_ENET_SWI_ERDSR)
0: interrupt masked
1: interrupt enabled.
0: interrupt masked
1: interrupt enabled.
0: interrupt masked
1: interrupt enabled.
0: interrupt masked
1: interrupt enabled.
0: interrupt masked
1: interrupt enabled.
0: interrupt masked
1: interrupt enabled.
0: interrupt masked
1: interrupt enabled.
0: interrupt masked
1: interrupt enabled.
29
13
0
0
HW_ENET_SWI_EIMR field descriptions (continued)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
27
11
0
0
26
10
0
0
Chapter 29 Programmable 3-Port Ethernet Switch with QOS (SWITCH)
ERDSR[15:2]
25
0
0
9
ERDSR[31:16]
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
19
0
0
3
18
0
0
2
17
RSRVD0
0
0
1
1931
16
0
0
0
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