MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 1600

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Unified DMA Block Guide
26.2.2.1.20.4
read/write bit will not be modified by hardware, nor will its value affect hardware.
26.2.2.1.20.5
bit does not change from the FEC.
26.2.2.1.20.6
Tx CRC. This bit is written by the user. If '0' this indicates that the frame is sent as-is and
it is up to the software to provide a valid frame with CRC field. If '1' the MAC will calculate
and append the CRC field to the frame.
26.2.2.1.20.7
modes and is ignored.
26.2.2.1.20.8
26.2.2.1.20.9
field does not change from the FEC.
26.2.2.1.20.10
buffer and must always be evenly divisible by 4. The functionality and operation of this
field does not change from the FEC.
26.2.2.1.20.11
not change from the FEC.
26.2.2.31 Enhanced Buffer Descriptor Models
In order to support various new functionality now available in the ENET-MAC the uDMA
also supports an enhanced buffer descriptor model (EBD).
what is being referred to as the EBD models. To promote the maximum reuse of driver
software where possible the LBD fields were reused.
26.2.2.31.1 Enhanced uDMA Receive Buffer Descriptor
This section discusses the enhanced uDMA receive buffer descriptors.
1600
• 0 The buffer descriptor is not the last in the transmit frame.
• 1 The buffer descriptor is the last in the transmit frame.
Bit-12 TO2
Transmit software ownership. This field is reserved for software use. This
Bit-11 L
Last in frame. Written by the user. The functionality and operation of this
Bit-10 TC
Bit-9 ABC
Append bad CRC. This bit is not supported in the uDMA legacy or enhanced
Bit 8-0
These values are reserved and should not be modified.
Data Length
Datalength. Written by the user. The functionality and operation of this
TX Data Buffer Pointer A[31:16]
TX data buffer pointer. A[31:0] contains the address of the associated data
TX Data Buffer Pointer A[15:0]
TX data buffer pointer. The functionality and operation of this field does
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 26-3
Freescale Semiconductor, Inc.
and
Table 26-4
shows