MCIMX281AVM4B Freescale Semiconductor, MCIMX281AVM4B Datasheet - Page 132

• Manufacturer Part Number: MCIMX281AVM4B
• Description: IC MPU I.MX28 1.2 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX281AVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Operation
5.2.1 Nesting of Multi-Level IRQ Interrupts
There are a number of very important interactions between the interrupt collector's FSM
and the interrupt service routine (ISR) running on the CPU. See
As soon as the interrupt source is recognized in the holding register, the FSM delays two
clocks, then grabs the vector address and asserts IRQ to the CPU. After the CPU enters the
interrupt service routine, it must notify the interrupt collector as soon as possible. Software
indicates the in-service state by writing to the HW_ICOLL_VECTOR register. The contents
of the data bus on this write do not matter. Optionally, firmware can enable the ARM read
side-effect mode. In this case, the in-service state is indicated as a side effect of having read
the HW_ICOLL_VECTOR register at the exception vector (0xFFFF0018). At this point,
132
32
63
.
.
.
Sources
INT
INTERRUPT37[PRIORITY]
INTERRUPT37[SOFTIRQ]
INTERRUPT37[ENABLE]
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
[37]
Figure 5-3. IRQ Control Flow
APB PIO Cycles
FSM
(1x)
Multicycle
Path 3x
Figure
IRQ
FIQ
APBH
Freescale Semiconductor, Inc.
ARM9
5-4.