dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 83

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
3.6.3.5
The address of the operand is the sum of the contents of the address register Rn, N, or SP and the contents
of the address offset register N. The content of N is treated as a signed, two’s-complement, 24-bit number.
The contents of the address register and N register are unchanged by this addressing mode. When a long
32-bit memory location is accessed, the N register is left shifted 1 bit before the addition.
Figure 3-19 demonstrates this addressing mode.
Freescale Semiconductor
Available for: Byte (Byte Pointer), Word, Long
Assembler Syntax: X:(Rn+N), X:(N+N), X:(SP+N)
Additional Instruction Execution Cycles: 1
Additional Effective Address Program Words: 0
A
35 32 31
A2
$007003
$007000
Index by Offset N: (Rn+N)
F
R2
E
N
Figure 3-19. Address Register Indirect: Indexed by Offset N
15
23
23
Before Execution
D
X
X
Indexed by Offset N Example:
A1
X Memory
$007000
$000003
C
X
X
B
16 15
X
X
X
X
Data Types and Addressing Modes
A
0
0
0
9
A0
+
8
7
0
MOVE.W A1,X:(R2+N)
A
35 32 31
A2
$007003
$007000
F
R2
E
N
15
23
23
After Execution
D
E
X
A1
X Memory
$007000
$000003
C
D
X
B
16 15
C
X
B
X
A
0
0
0
Addressing Modes
9
A0
8
7
0
3-33

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