dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 652
dsp56800e
Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800E.pdf
(706 pages)
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TSTDECA.W
Operation:
D – 0
D – 1 → D
Description: Compare the low-order 16 bits of an AGU address register with zero, and set the condition codes ac-
Usage:
Example:
Explanation of Example:
Note:
Condition Codes Affected:
A-308
Before Execution
R0
cordingly. The entire 24 bit field is then decremented by one, and the result is placed back into the des-
tination register.
This instruction can be used to step backwards through a memory buffer, testing to see that the pointer
is still valid after each step.
TSTDECA.W R0
Prior to execution, the R0 register contains $00B360. The execution of the TSTDECA.W R0 instruc-
tion causes the value in the R0 to be compared to zero, updating the CCR accordingly. The value in
R0 is then reduced by one, and the result ($00B35F) is stored back in R0.
This instruction operates on only the low-order 16 bits of the AGU pointer register. It is compatible
with the DSP56800 TSTW (Rn)- instruction, since both use 16-bit arithmetic.
N
Z
V
C
LF
15
SR
— Set if bit 15 of the result is set
— Set if all bits in the result are zero
— Always cleared
— Always cleared
(no parallel move)
P4
14
00B360
13
P3
0338
P2
12
MR
DSP56800E Core Reference Manual
P1
11
Word in AGU Register
Test and Decrement
P0
10
; compare R0 to 0, then decrement
I1
9
Assembler Syntax:
TSTDECA.W
I0
8
SZ
7
After Execution
6
L
R0
5
E
D
SR
U
4
CCR
00B35F
N
3
(no parallel move)
TSTDECA.W
0338
2
Z
Freescale Semiconductor
V
1
C
0
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