dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 432

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
CLR
Parallel Dual Reads:
Instruction Opcodes:
Timing:
Memory:
A-88
CLR
CLR
CLR
CLR
1.This instruction is not allowed when the XP bit in the OMR is set (that is, when the instructions are executing
from data memory).
2.This instruction occupies only 1 program word and executes in 1 cycle for every addressing mode.
Operation
CLR
Data ALU Operation
F
F GGG,X:<ea_m>
F X:<ea_m>,GGG
F X:<ea_m>,reg1
X:<ea_v>,reg2
2
1 oscillator clock cycle
1 program word
Operands
F
1
DSP56800E Core Reference Manual
Clear Accumulator
15
15
15
15
0
0
0
0
Source 1
X:(R0)+N
X:(R1)+N
X:(R4)+N
X:(R0)+N
X:(R4)+N
X:(R0)+
X:(R1)+
X:(R4)+
X:(R0)+
X:(R4)+
1
0
0
1
First Memory Read
1
0
1
1
12
12
12
12
1
0
0
1
11
11
11
11
0
1
1
0
Destination 1
G
G
1
1
Y0
Y1
Y0
Y1
G
G
1
v
G
G
1
v
8
8
8
8
F
F
F
F
7
7
7
7
X:(R3)+N3
X:(R3)+N3
Source 2
1
0
0
X:(R3)+
X:(R3)–
X:(R3)+
X:(R3)+
v
Second Memory Read
Freescale Semiconductor
0
1
1
0
0
1
1
1
4
4
4
4
0
0
0
0
3
3
3
3
Destination 2
m
m
m
1
CLR
X0
X0
C
R
R
1
0
R
R
1
v
0
0
0
0

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