dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 137

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Freescale Semiconductor
ADDA
ADDA.L
ASLA
ASRA
CMPA
CMPA.W
DECA
DECA.L
DECTSTA
Operation
#xxxxxx,HHH,Rn
#xxxxxx,HHH,Rn
#xxxxxx,Rn,Rn
#xxxxxx,Rn,Rn
#<0–15>,Rn,N
#xxxx,HHH,Rn
#xxxx,HHH,Rn
#xxxxx,Rn,Rn
#xxxx,Rn,Rn
#<0–15>,Rn
Operands
Rn,Rn,N
Rn,Rn,N
Table 4-35. AGU Arithmetic and Shifting Instructions
Rn,Rn
Rn,Rn
Rn,Rn
Rn,Rn
Rn,Rn
Rn
Rn
Rn
Rn
Instruction Set Introduction
C
1
1
1
1
2
3
4
5
1
1
2
3
4
5
1
1
1
1
1
1
1
W
1
1
1
1
2
3
2
3
1
1
2
3
2
3
1
1
1
1
1
1
1
Add first operand to the second and store the result in the
second operand.
Add first operand to the second and store result in the N reg-
ister.
Add unsigned 4-bit value to Rn.
Add an unsigned 4-bit value to an AGU register and store
result in the N register.
Add first register with a signed 17-bit immediate value and
store the result in Rn.
Add first register with a 24-bit immediate value and store the
result in Rn.
Add a data register with an unsigned 16-bit value and store
the result in Rn. HHH is accessed as a signed 16-bit word.
Add a data register with a 24-bit immediate value and store
the result in Rn. HHH is accessed as a signed 16-bit word.
Add first operand left shifted 1 bit to the second and store the
result in the second operand.
Add first operand left shifted 1 bit to the second and store
result in the N register.
Add first register left shifted 1 bit with an unsigned 16-bit
immediate value and store the result in Rn.
Add first register left shifted 1 bit with a 24-bit immediate
value and store the result in Rn.
Add a data register left shifted 1 bit with an unsigned 16-bit
immediate value and store the result in Rn. HHH is accessed
as a signed 16-bit word.
Add a data register left shifted 1 bit with a 24-bit immediate
value and store the result in Rn. HHH is accessed as a
signed 16-bit word.
Arithmetic shift left AGU register by 1 bit.
Arithmetic shift right AGU register by 1 bit.
24-bit compare between two AGU registers.
16-bit compare between two AGU registers.
Decrement AGU register by one.
Decrement AGU register by two.
Decrement and test AGU register.
Comments
Instruction Set Summary
4-41

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