dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 138

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Instruction Set Introduction
4-42
LSRA
NEGA
SUBA
SXTA.B
SXTA.W
TFRA
TSTA.B
TSTA.L
TSTA.W
TSTDECA.W
ZXTA.B
ZXTA.W
BFCHG
Operation
Operation
#<MASK16>,X:(Rn+xxxx)
Table 4-35. AGU Arithmetic and Shifting Instructions (Continued)
#<MASK16>,X:(SP–xx)
#<MASK16>,X:xxxxxx
#<MASK16>,DDDDD
#<MASK16>,X:<<pp
#<MASK16>,X:(Rn)
#<MASK16>,X:xxxx
#<MASK16>,X:aa
#<MASK16>,dd
#<1–64>,SP
Operands
Operands
Rn,Rn
Rn,Rn
Rn
Rn
Rn
Rn
Rn
Rn
Rn
Rn
Rn
Rn
Table 4-36. Bit-Manipulation Instructions
DSP56800E Core Reference Manual
C
1
1
1
1
1
1
1
1
1
3
1
1
C
2
2
2
3
3
2
2
3
4
W
1
1
1
1
1
1
1
1
1
1
1
1
W
2
2
2
3
2
2
2
3
4
Logical shift right AGU register by 1 bit.
Negate AGU register.
Subtract the first operand from the second and store the
result in the second operand.
Subtract a 6-bit unsigned immediate value from the SP and
store in the stack pointer.
Sign extend the value in an AGU register from bit 7.
Sign extend the value in an AGU register from bit 15.
Transfer one AGU register to another.
Test byte portion of an AGU register.
Test long portion of an AGU register.
Test word portion of an AGU register.
Test and decrement AGU register.
Note: Only operates on the lower 16 bits of the register;
the upper 8 bits are forced to zero.
Zero extend the value in an AGU register from bit 7.
Zero extend the value in an AGU register from bit 15.
BFCHG tests all the targeted bits defined by the 16-bit
immediate mask. If all the targeted bits are set, then the C
bit is set. Oterwise it is cleared. Then the operation
inverts all selected bits.
All registers in DDDDD are permitted except HWS and Y.
Comments
Comments
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