dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 623

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

SUBL
Operation:
(D << 1) – A → B
Description: Subtract the A accumulator from two times accumulator D. The result is stored in accumulator B, and
Usage:
Example:
Explanation of Example:
Note:
Condition Codes Affected:
Parallel Moves:
Instruction Opcodes:
Timing:
Memory:
Freescale Semiconductor
SUBL
Operation
SUBL
Before Execution
A,D,B
B2
A2
D2
F
0
0
new values are loaded into accumulators A and D from the data memory location pointed to by R1.
The address pointer R1 is then post-incremented. The result is not affected by the state of the saturation
bit (SA).
The SUBL instruction is designed to accelerate the fast Fourier transform (FFT) algorithm.
SUBL
Prior to execution, the A accumulator contains the value $0:0080:0000, and the D accumulator con-
tains $0:0742:5555. The D1 register is then sign extended and shifted left 1 bit, resulting in the inter-
mediate value $0:0E84:AAAA. The value in A1 is then subtracted, and the result ($0:0E04:AAAA) is
stored in the B accumulator. A new value is read into accumulators A and D; the address register is
post-incremented by 1.
The operands for the instruction are always the A, D, and B accumulators, in that order. The parallel
move that occurs is also always of the same type, where both the A and D accumulators are updated
from memory. The syntax for this instruction always appears as shown in the example.
The condition codes are not affected by this instruction.
1 oscillator clock cycle
1 program word
A,D,B
(special parallel reads)
FFFF
X:(R1)+,AD
0080
0742
B1
D1
A1
Operands
A,D,B
X:(R1)+,AD
Shift Left and Subtract
X:(R1)+,AD
FFFF
0000
5555
B0
D0
A0
15
0
C
1
Instruction Set Details
1
W
1
1
Assembler Syntax:
SUBL
Shift accumulator left and subtract word value
12
1
; shift and subtract A from D,
; update A and D from memory
11
0
After Execution
1
B2
D2
A2
0
0
0
0
A,D,B
0
8
63C2
0E04
63C2
B1
D1
A1
Comments
7
1
0
0
X:(R1)+, AD
1
4
AAAA
0000
0000
B0
D0
A0
0
3
SUBL
1
1
A-279
1
0