dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 622

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

SUBA
Operation:
D – S → D (no parallel move)
Description: Subtracts an AGU register or immediate value from an AGU pointer register, storing the result in the
Example:
Explanation of Example:
Condition Codes Affected:
Instruction Fields:
Instruction Opcodes:
Timing:
Memory:
A-278
SUBA
SUBA
Operation
SUBA
Before Execution
#<1–64>,SP
Rn,Rn
R0
R1
destination register. The subtraction is performed using 24-bit two’s-complement arithmetic. If an im-
mediate value is the source operand for the operation, it is zero extended to 24 bits before the subtrac-
tion takes place.
SUBA
The address pointer register R0 initially contains $0002C4, while R1 initially contains $1712C4. When
the SUBA R0,R1 instruction is executed, the value in R0 is subtracted from R1, and the result
($171000) is stored in address register R1.
The condition codes are not affected by this instruction.
1 oscillator clock cycle
1 program word
#<1–64>,SP
Operands
0002C4
1712C4
R0,R1
Rn,Rn
DSP56800E Core Reference Manual
Subtract AGU Registers
15
15
1
1
C
1
1
0
0
; subtract R0 from R1 and store in R1
W
1
1
0
0
Assembler Syntax:
SUBA
Subtract the first operand from the second and store the result
in the second operand
Subtract a 6-bit unsigned immediate value from the SP and
store in the stack pointer
12
12
0
1
11
11
1
1
After Execution
R0
R1
0
1
1
1
S,D
1
1
8
8
0002C4
171000
Comments
7
n
7
0
(no parallel move)
0
1
Freescale Semiconductor
1
a
n
a
4
4
R
a
3
3
SUBA
n
a
R
a
R
a
0
0