dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 631

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Tcc
Operation:
If (cc), then S → D
If (cc), then S → D and R0 → R1
Description: Transfer data from the specified source register (S) to the specified destination (D) if the specified con-
Usage:
Note:
Freescale Semiconductor
dition is true. If the source is a 16-bit register, it is first sign extended and concatenated to 16 zero bits
to form a 36-bit value (the Y register is only sign extended) before the transfer. When the saturation
bit (SA) is set, saturation may occur if necessary—that is, the value transferred is substituted by the
maximum positive (or negative) value. If a second source register R0 and a second destination register
R1 are also specified, the instruction transfers the value from address register R0 to address register
R1 if the specified condition is true. If the specified condition is false, a NOP is executed.
When used after the CMP instruction, the Tcc instruction can perform many useful functions such as
a “maximum value” or “minimum value” function. The desired value is stored in the destination accu-
mulator. If address register R0 is used as an address pointer into an array of data, the address of the
desired value is stored in the address register R1. The Tcc instruction can be used after any instruction
and allows efficient searching and sorting algorithms.
The term “cc” specifies the following:
This instruction is considered to be a move-type instruction. Due to pipelining, if an address register
(R0 or R1 for the Tcc instruction) is changed using a move-type instruction, the new contents of the
destination address register will not be available for use during the following instruction (that is, there
is a single-instruction-cycle pipeline delay).
CC (HS*)— carry clear (higher or same)
CS (LO*)— carry set (lower)
EQ— equal
GE— greater than or equal
GT— greater than
LE— less than or equal
LT— less than
NE— not equal
* Only available when the CM bit in the OMR is set
+denotes the logical OR operator
⊕denotes the logical exclusive OR operator
“cc” Mnemonic
Transfer Conditionally
Instruction Set Details
Assembler Syntax:
Tcc
Tcc
C = 0
C = 1
Z = 1
N ⊕ V = 0
Z + (N ⊕ V) = 0
Z + (N ⊕ V) = 1
N ⊕ V = 1
Z = 0
S,D
S,D
Condition
(no parallel move)
R0,R1
Tcc
A-287