dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 474

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
DOSLC
Operation:
HWS0 → HWS1;
LA → LA2
LF → NL
PC → HWS0
D → LA
1 → LF
Operation When Loop Completes (End-of-Loop Processing):
If NL == 1
HWS1 → HWS0
NL → LF
0 → NL
Description: Begin a hardware DO loop that is to be repeated for the number of times specified in the loop counter
Example:
Explanation of Example:
Condition Codes Affected:
Restrictions:
A-130
LC2 → LC, LA2 → LA
(LC) register. The value of LC must be loaded prior to executing this instruction. If the value in LC is
zero or negative, the instructions in the body of the loop are skipped. The destination operand D can
be a 16- or 21-bit absolute address. See the section on the DO instruction for more information on hard-
ware looping.
END
This example illustrates a DO loop with a pre-existing value for LC. For a number of words in the buff-
er equal to “count,” the loop reads word values from a buffer in memory, negates them, and writes the
values back. The END label is located at the first instruction past the end of the DO loop.
LF —
Refer to Section 10.4, “Pipeline Dependencies and Interlocks,” on page 10-26.
LF
15
14
*
Set when a DO loop is in progress
MOVEU.W
...
DOSLC
MOVE.W
NEG
MOVE.W
13
*
12
*
MR
DO Loop with Value in LC
DSP56800E Core Reference Manual
11
*
#count,LC
END
X:(R0),A
A
A,X:(R0)+
:
10
*
I1
9
Assembler Syntax:
DOSLC
I0
8
; load LC register
; begin DO loop with value in LC
; negate value from buffer
; last instruction in DO loop
; (outside DO loop)
SZ
7
6
L
5
E
D
U
4
CCR
N
3
2
Z
Freescale Semiconductor
V
1
C
0
DOSLC

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