dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 198

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

Address Generation Unit
6.2.1
The address register file consists of six 24-bit registers, R0–R5, which are typically used as pointers to
memory. The offset register, N, can also be used as an address register. The address registers can directly
drive the core’s three address buses, minimizing access time to internal and external data and program
memory.
The address registers can be used to access byte, word, and long values in data memory, and they can be
used as byte or word pointers (see Section 3.5.1, “Word and Byte Pointers,” on page 3-17). Any address
register can be used for accessing either on-chip or off-chip data memory, including the R3 register when it
is used in the secondary access of a dual read instruction. Only the R0–R3 registers can be used to access
on-chip or off-chip program memory.
6.2.2
The stack pointer register (SP) is a 24-bit register that is used to access the software stack. The stack
pointer register can be used to access byte, word, and long values in data memory. It is always used as a
word pointer (see Section 3.5.1, “Word and Byte Pointers,” on page 3-17).
The SP register can be used by a program to access data on the software stack, or it can be used implicitly
by instructions that store information on the stack as part of their regular operation. These instructions
include jumps to subroutines and interrupt handlers, which push the current program counter and status
register on the stack.
This register is not initialized to a known value after reset. Applications need to explicitly establish the
base of the stack after reset, taking care that the stack area does not overlap any other data area. Note that
the software stack grows upward when values are pushed onto it.
6-4
Address Registers (R0–R5, N)
Stack Pointer Register (SP)
Pipeline dependencies might be encountered when the AGU registers are
modified. Refer to Section 10.4.2, “AGU Pipeline Dependencies,” on
page 10-28 for more information.
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Figure 6-3. Address Generation Unit Programming Model
Pointer Registers
R0
R1
N
SP
R2
R3
R4
R5
DSP56800E Core Reference Manual
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NOTE:
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15
Secondary Offset Register
Modifier Registers
M01
N3
Freescale Semiconductor
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0