dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 304
dsp56800e
Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56800E.pdf
(706 pages)
- Current page: 304 of 706
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Instruction Pipeline
10.3.8.4
Another case of interest is the time from the enabling of an interrupt by updating the CCPL in the status
register until the time when the interrupt controller first arbitrates with the newly modified CCPL and an
already pending interrupt is serviced.
10-24
Pipeline
Int Arbitr
Int Req
Stage
i = Interrupt Arbitration and Request
i% = Interrupt Request rejected by core and remains pending
ii = Interrupt instruction word
n = Normal instruction word
OP2
EX2
AG
EX
P1
P2
IF
ID
Synchronized and
Recognized
Re-Enabled
as Pending
Delay When Enabling Interrupts via CCPL
rep
1
Interrupts
i
Interrupt
Interrupt Requests Sampled
rep
i%
n2
2
Figure 10-12. Interrupt Latency and the REP Instruction
by the Arbiter
rep
i%
n2
3
rep
i%
n2
4
n1 (REP #4)
Program
Main
DSP56800E Core Reference Manual
rep
rep
i%
n2
n3
n4
n5
n6
5
rep
rep
i%
n2
6
(b) Interrupt Pipeline
(a) Instruction Flow
rep
rep
i%
n2
n2
7
Instruction Cycle
rep
rep
i%
n2
n2
n2
8
rep
n2
n2
n2
n2
9
i
4 Times
Repeat
10
n2
n2
n2
n2
ii0
—
11
n2
ii1
ii0
—
—
n2
n2
12
ii1
ii1
ii0
—
—
—
n2
n2
Jump Address
13
ii1
ii1
ii1
jsr
—
—
—
n2
JSR
Process Interrupt:
Fetch JSR Instruction from
the Interrupt Vector Table
14
jsr
ii2
ii1
ii1
jsr
—
—
—
Freescale Semiconductor
Instruction n2 Replaced per
the REP Instruction
n2
15
jsr
jsr
jsr
ii3
ii2
ii1
—
—
n2
n2
16
ii3
ii2
jsr
jsr
jsr
jsr
—
•
n2
17
jsr
ii3
ii2
jsr
jsr
jsr
•
•
18
ii2
jsr
jsr
jsr
ii3
•
•
•
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