dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 422

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dsp56800e

Manufacturer Part Number
dsp56800e
Description
16-bit Digital Signal Controller Core
Manufacturer
Freescale Semiconductor, Inc
Datasheet
BRCLR
Instruction Fields:
A-78
Operation
BRCLR
1.The first cycle count refers to the case when the condition is true and the branch is taken. The
second cycle count refers to the case when the condition is false and the branch is not taken.
#<MASK8>,X:(Rn+xxxx),AA
#<MASK8>,X:(SP–xx),AA
#<MASK8>,X:xxxxxx,AA
#<MASK8>,DDDDD,AA
#<MASK8>,X:<<pp,AA
#<MASK8>,X:xxxx,AA
#<MASK8>,X:(Rn),AA
#<MASK8>,X:aa,AA
#<MASK8>,dd,AA
Operands
DSP56800E Core Reference Manual
Branch if Bits Clear
7/5
7/5
7/5
8/6
8/6
7/5
7/5
7/5
8/6
C
1
W
2
2
2
3
2
2
2
3
4
BRCLR tests all the targeted bits defined by
the immediate mask. If all the targeted bits
are clear, then the carry bit is set and a
PC-relative branch occurs. Otherwise it is
cleared and no branch occurs.
All registers in DDDDD are permitted except
HWS and Y.
MASK8 specifies a 16-bit immediate value,
where either the upper or lower 8 bits contain
all zeros. AA specifies a 7-bit PC-relative off-
set.
Comments
Freescale Semiconductor
BRCLR

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