dsp56800e Freescale Semiconductor, Inc, dsp56800e Datasheet - Page 335

• Manufacturer Part Number: dsp56800e
• Description: 16-bit Digital Signal Controller Core
• Manufacturer: Freescale Semiconductor, Inc

11.4.4.3.3
The Capture Counter can also work in conjunction with the 24-bit step counter so that the action is taken a
specified number of clock cycles after a Capture Counter trigger is generated. This configuration is
illustrated in Figure 11-12.
This configuration also uses the Start-Stop triggers listed in Table 11-8, where the Breakpoint Unit can use
any of the configurations in Table 11-9 and Table 11-10.
11.4.4.3.4
Table 11-12 shows the actions which can be performed in this configuration. Note the unusual triggering
which can be performed to check that the Capture Counter expires before a Stop trigger arrives. Similarly,
the reverse triggering is also supported - trigger only if the Stop trigger arrives before the Capture Counter
expires.
Freescale SemiconductorJTAG and Enhanced On-Chip Emulation (Enhanced OnCE)
Case CCSC1
Case CCSC2
Case CCSC3
Case CCSC4
Case CCSC5
Case CCSC6
Clocks w/o Wait States
Instructions Executed
Using the Capture Counter with the Step Counter
16-bit Capture Counter — Step Counter Actions
Figure 11-12. Triggering the Step Counter with the Capture Counter
Table 11-12. Possible Capture Counter Actions — Non-Cascaded
Capture Counter reaches zero before
Counter Stop Trigger occurs
=> Step Counter reaches zero
— OR —
Capture Counter reaches zero
=> Step Counter reaches zero
(for cases where no Stop Trigger is configured)
Counter Stop Trigger occurs before
Capture Counter reaches zero
=> Step Counter reaches zero
Clocks
Trigger for Action
MUX
Start
Start
16-Bit Breakpoint
Counter
Buffer
Trace
Start
Stop
Capture Counter
Enhanced OnCE and the Processing States
Trigger
Generate Step Counter Interrupt Request
Generate Step Counter Interrupt Request
Enter Debug state
Start Trace Buffer Capture when
Capture Counter reaches zero.
Halt Trace Buffer Capture when
Step Counter reaches zero.
Enter Debug state
Start Trace Buffer Capture when
Capture Counter reaches zero.
Halt Trace Buffer Capture when
Step Counter reaches zero.
Step Counter
Interrupt
Action Performed
Step Counter
Select
Action
24-Bit
Core
Halt
Halt Trace
Buffer
11-23